NXP Semiconductors /MIMXRT1064 /FLEXSPI /IPTXFCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as IPTXFCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLRIPTXF)CLRIPTXF 0 (TXDMAEN_0)TXDMAEN 0TXWMRK

TXDMAEN=TXDMAEN_0

Description

IP TX FIFO Control Register

Fields

CLRIPTXF

Clear all valid data entries in IP TX FIFO.

TXDMAEN

IP TX FIFO filling by DMA enabled.

0 (TXDMAEN_0): IP TX FIFO would be filled by processor.

1 (TXDMAEN_1): IP TX FIFO would be filled by DMA.

TXWMRK

Watermark level is (TXWMRK+1)*64 Bits.

Links

() ()